Vision Sensor with a SIMD Processor Array in a Vertically Stacked 3D Integrated Circuit Technology
نویسندگان
چکیده
We present a design of a vision sensor device, implemented in a three-dimensional (3D) silicon on insulator (SOI) 150nm CMOS technology. The proof-of-concept device contains an image sensor array on one layer, and a pitchmatched array of 32x32 pixel-parallel processors, distributed over two further layers. The processor array uses mixed-mode processing elements and operates in SIMD (Single Instruction Multiple Data) mode, providing low-level image processing operations on the sensory data. The inter-layer communication is achieved by means of through-silicon vias (TSVs), on a pixelparallel level, and the system is partitioned to minimise the area overhead associated with this communication.
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